Cat Qubits With an Outer Repetition Code

Short answer: Cat qubits are bosonic qubits that suppress bit-flip errors using a stabilizing circuit, which leaves phase flips to be corrected by an outer repetition code. A 2020 preprint, published in 2021, estimated resource overheads for this approach by simulation. A 2025 Nature paper reports a superconducting-circuit logical memory using it, with a minimum logical error per cycle of 1.65 percent for a distance-5 code.

What is the concatenated cat-qubit idea?

The 2020 arXiv preprint, later published in Physical Review A in 2021, describes cat qubits stabilized by two-photon dissipation as having extremely biased noise, in which the bit-flip error rate is exponentially suppressed with the mean number of photons. The remaining phase-flip errors could be suppressed by a one-dimensional repetition code. The authors state that using only bias-preserving gates on the cat qubits, a universal set of fault-tolerant logical gates can be built at the level of the repetition cat qubit.

What did the simulations estimate?

The authors performed Monte-Carlo simulations of the circuits implementing the protected logical gates using a circuit-level error model, and analysed two approaches to a fault-tolerant Toffoli gate on repetition cat qubits. They say their numerical simulations indicate that very low logical error rates could be achieved with a reasonable resource overhead and with parameters within reach of near-term circuit quantum electrodynamics experiments. These are simulated estimates and not measurements.

What did the 2025 experiment report?

The Nature abstract starts from the problem that error correction needs many physical qubits for each logical qubit, which motivates hardware-efficient approaches. Using a superconducting quantum circuit, the authors realize a logical qubit memory formed from concatenating encoded bosonic cat qubits with an outer repetition code of distance d equal to 5. A stabilizing circuit passively protects the cat qubits against bit flips, and the repetition code, using ancilla transmons for syndrome measurement, corrects phase flips. They find that the phase-flip correcting repetition code operates below threshold, and that logical bit-flip error is suppressed as cat-qubit mean photon number increases, enabled by a cat-transmon noise-biased CX gate. They report a minimum logical error per cycle of 1.75(2) percent on average for distance-3 code sections and 1.65(3) percent for the distance-5 code, and say that the high degree of noise bias preserved during error correction makes performance comparable despite more fault locations.

What to keep in mind

The experiment is a memory demonstration of error correction in one circuit, and the reported logical error per cycle is on the order of one to two percent. It is not a universal fault-tolerant computer, and the preprint's gate overhead figures are simulated. A third listed source, a 2022 arXiv paper, returned no readable text, so nothing is claimed from it. This post is based on abstracts and visible summary text only.

FAQ

Why do cat qubits help?

According to the 2020 preprint, the bit-flip rate is exponentially suppressed with mean photon number, so mainly phase flips remain.

What corrects the phase flips?

An outer repetition code with ancilla transmons measuring syndromes, per the 2025 paper.

What logical error rate was measured?

1.75(2) percent per cycle for distance-3 sections and 1.65(3) percent for distance 5, as the minimum measured values.

Is this fault-tolerant computing?

The 2025 paper demonstrates a logical memory. The 2020 simulation work discusses gates, but as estimates.