Frequency collisions in fixed-frequency transmon processors

Short answer: In fixed-frequency superconducting processors, fabrication variation in the Josephson junctions spreads qubit frequencies, and multiqubit gates need those frequencies to sit within tight bounds, so neighbouring qubits can end up in a "frequency collision". A 2021 npj Quantum Information paper reports post-fabrication tuning that improves frequency-setting precision nearly tenfold, a 2022 Physical Review Research paper proposes an optimization approach to maximize processor yield, and a 2023 Physical Review Research paper reports more reproducible qubit frequencies from larger junctions. These are research results.

Why do frequency collisions occur in fixed-frequency architectures?

The reproducibility of qubit parameters is a challenge for scaling up superconducting quantum processors. The frequency uncertainty of transmon qubits arises from deviations in the Josephson junction area, tunnel barrier thickness, and the qubit shunt capacitor during fabrication. These physical variations lead to a large dispersion in the final qubit frequencies.

Signal cross talk imposes constraints on the frequency separation between neighboring qubits. To maintain addressability, individual transmons require sufficiently large detunings between neighbors to avoid detrimental crosstalk effects. However, the cross-resonance (CR) gate, a popular all-microwave entangling gate, requires that involved transmon qubits are not detuned by more than their anharmonicity to generate fast entangling gates. These conflicting constraints make it difficult to determine reasonable frequencies for more than a handful of qubits when fabrication dispersion is high.

How does fabrication precision impact scalability?

The 2021 authors report, from statistical modeling, that without post-fabrication tuning the probability of finding a workable lattice quickly approaches 0, and that scaled-up lattices will fail to evade frequency collisions with untuned transmon fabrication. The severity of these collisions depends on the relative frequency uncertainty compared to specific collision bounds.

The 2023 authors report decreasing the sensitivity to these variations by fabricating larger Josephson junctions, reducing the wafer-level standard deviation in resistance to 2%. They characterize 32 identical transmon qubits and report qubit frequencies reproducible to a 40 MHz standard deviation, which they put at 1%, with qubit quality factors exceeding 2 million.

What optimization strategies are proposed to mitigate collisions?

The 2022 paper proposes a mixed-integer-programming-based optimization approach to determine qubit frequencies that maximize the fabrication yield of quantum processors. This approach is general and can be adapted to problems where one must avoid specific frequency collisions. It studies traditional qubit and qutrit architectures with cross-resonance interaction processors.

The optimization compares these architectures to a differential ac-Stark shift based on entanglement gates. The authors say their approach greatly improves the fabrication yield and increases scalability. Separately, the 2021 paper reports that systematically adjusting qubit frequencies after fabrication gives a nearly tenfold improvement in the precision of setting them, and that with the demonstrated precisions it is possible to find collision-free lattices with favorable yield.

How do frequency uncertainties affect gate operations?

The 2021 paper identifies the types of frequency collisions that impair a transmon qubit and cross-resonance gate architecture. Neighboring qubits having the wrong detuning will exhibit a frequency collision in which the ZX interaction may be suppressed. The magnitude of the ZX interaction depends on the frequencies of the two qubits. Diminished ZX magnitude reduces the effectiveness of the entangling gate.

The 2023 authors add that for their parametric-gate architecture, a simulation that accounts only for errors from the qubit frequency uncertainty gives an average of only three collisions between quantum-gate transition frequencies at larger sizes, assuming crosstalk and target gate fidelity constraints are met. Their two-level-system spectroscopy observed no significant increase in the number of two-level systems causing qubit relaxation. This simulation concerns a different gate architecture from the cross-resonance one above.

FAQ

Can frequency collisions be completely eliminated?

The 2021 authors report that with the demonstrated precisions it is possible to find collision-free lattices with favorable yield, which is a statement about yield, not a guarantee for every run.

What physical parameters cause frequency variations?

Deviations in the Josephson junction area, tunnel barrier thickness, and the qubit shunt capacitor are attributed to the frequency uncertainty. Fabricating larger Josephson junctions decreases sensitivity to these variations.

Does the optimization approach apply to all architectures?

The mixed-integer-programming approach is general and can be adapted to problems where one must avoid specific frequency collisions. It has been studied for traditional qubit and qutrit architectures with cross-resonance interactions.

How does post-fabrication tuning improve scalability?

Systematic post-fabrication adjustment provides a nearly tenfold improvement in the precision of setting qubit frequencies. This allows for the identification of collision-free lattices with favorable yield for larger processor sizes.

Are these solutions currently deployed in commercial systems?

No claim of that kind is made. The papers report device measurements, statistical models and an optimization proposal.