Real-time decoding for quantum error correction on FPGAs

Short answer: A quantum error-correcting code produces a stream of syndrome data that a classical decoder must interpret fast enough to keep up with the qubits. If decoding is too slow, a backlog builds and slows the computation. Recent papers report FPGA decoders with sub-microsecond decoding per round, a measured 9.6 microsecond decoding response on an 8-qubit experiment, and an integrated control and decoding prototype with 446 nanoseconds latency in a distance-3 surface code. These are research demonstrations, not a finished product.

The speed requirement

A 2026 Nature Communications paper says that as quantum computers move toward a universal fault-tolerant gate set, scalable low-latency real-time decoding is crucial to avoid an exponential slowdown and to maintain a fast logical clock rate. A 2025 paper in the same journal states the problem as needing a decoder that is both accurate and fast enough for feedback. It says existing systems fail to satisfy both, so they either slow the quantum computer or limit the number of operations before the information is corrupted.

A decoder with an adaptivity engine

The 2025 paper introduces the Local Clustering Decoder, implemented on FPGAs, which exploits hardware parallelism to keep pace with the fastest qubit types. It has an adaptivity engine that lets the decoder update itself in real time in response to control signals such as heralded leakage events. Under a circuit-level noise model in which leakage is a dominant error source, the authors report in simulation that their decoder enables one million error-free quantum operations with 4 times fewer physical qubits than standard non-adaptive decoding, while decoding in under 1 microsecond per round with modest FPGA resources. They conclude that high-accuracy real-time decoding is possible and can reduce the qubit counts needed for large-scale fault-tolerant computation.

Feedback on a superconducting processor

The 2026 paper demonstrates low-latency feedback using a scalable FPGA decoder integrated into the control system of a superconducting quantum processor. In an 8-qubit stability experiment with up to 25 decoding rounds, the mean decoding time was below a microsecond per round, which the authors describe as strong evidence that the backlog problem will be avoided when the decoder runs as a streaming decoder on hardware with the strictest speed requirements. They observe logical error suppression as the number of decoding rounds increases. In a fast-feedback experiment with logical branching, the full decoding response time was 9.6 microseconds for nine measurement rounds, made up of 6.5 microseconds of decoding and 3.1 microseconds of communication and control latency. The decoder is an FPGA implementation of a Collision Clustering decoder.

The whole system matters

A 2026 arXiv paper argues that while most work has focused on decoder design, overall performance depends on all subsystems, including control, communication and decoding, and on their integration. It presents an open-source, fully integrated error-correction system built on RISC-Q, a generator of RISC-V based quantum control architectures, implemented on RFSoC FPGAs. The prototype combines real-time qubit control, a distributed multi-board architecture and a hardware decoder in a low-latency pipeline. On a three-board prototype the authors measure an end-to-end decoding-feedback latency of 446 nanoseconds for a distance-3 surface code, including syndrome aggregation and network transfer.

What this does not tell you

The one million operation result is from simulation under a stated noise model. The experiments use small codes on a few qubits, and the integrated prototype was evaluated in a distance-3 setting. None of them shows real-time decoding at the scale of a full fault-tolerant machine.

FAQ

Why does decoding have to be real time?

A slow decoder lets a backlog build up and slows the logical clock, according to the 2026 paper.

How fast have decoders been?

Under 1 microsecond per round in the 2026 experiment and 2025 simulations.

What was the measured feedback time?

9.6 microseconds for nine measurement rounds, including 3.1 microseconds of communication and control.

Why integrate control and decoding?

A 2026 arXiv paper says overall performance depends on all subsystems and their integration.

Is this ready for large machines?

These papers report small experiments and prototypes.