Short answer: Flip-chip integration puts a qubit chip and a control chip face to face, joined by bump bonds or other contacts, so wiring can come in through the third dimension. Published superconducting-qubit experiments report that coherence and gate fidelity can be kept in this geometry: coherence times above 90 microseconds, single-qubit gate fidelities above 99.9% and two-qubit fidelities above 98.6% in one transmon study. These are laboratory modules with a few qubits.
Why 3D integration
A 2017 npj Quantum Information paper says that as quantum computing moves from few-qubit devices to larger processors, qubit addressability and extensibility will need 3D integration and packaging. It notes that 3D integration is well developed for commercial electronics, but that little work had tested whether it is compatible with high-coherence solid-state qubits. The concern is that qubit coherence can be suppressed by the processing steps and by the close proximity of another chip.
Flux qubits in a flip-chip, 2017
The authors use a flip-chip process to bond a chip carrying superconducting flux qubits to another chip with readout and control structures. They demonstrate that high coherence, with T1 and T2 echo above 20 microseconds, is kept in the flip-chip geometry with galvanic, capacitive and inductive coupling between the chips.
Transmons in bump-bonded modules, 2022
A 2022 Quantum Science and Technology paper integrates single and coupled transmon qubits into flip-chip modules, each with one quantum chip and one control chip bump-bonded together. The authors report time-averaged coherence times above 90 microseconds, single-qubit gate fidelities above 99.9% and two-qubit gate fidelities above 98.6%. They also describe design methods and the sensitivity of device parameters to the spacing between the chips. They state that the extra flip-chip fabrication steps do not degrade performance compared with their single-chip planar baseline, and that the technique could extend to modules with hundreds of qubits because it gives wiring access to all qubits and couplers. The last point is a projection.
A simpler assembly method, 2021
A 2021 Applied Physics Letters paper contrasts the standard flip-chip method, which uses superconducting galvanic connections, typically by indium wafer bonding that is reliable and temperature-cyclable but expensive, somewhat inflexible and demanding of robust substrates, with a much simpler approach: assembling dies using very low-force contacts and air-dried adhesives, which gives no galvanic contact between the dies. The authors demonstrate that the simpler technique can reliably couple superconducting qubit circuits placed on separate chips.
Limits
The experiments use a few qubits per module, and the hundreds-of-qubits statement is the authors' expectation. Each paper uses its own qubit type and metrics.
What the papers address
The 2017 paper asks whether the geometry harms coherence at all. The 2022 paper asks whether the extra fabrication steps harm transmon performance and how sensitive parameters are to chip spacing. The 2021 paper asks whether a cheaper, simpler assembly can still couple qubit circuits on separate chips. Together they treat 3D integration as a question of preserving performance while gaining wiring access, with each answering for its own devices.
FAQ
What is a flip-chip?
Two chips joined face to face, here one holding qubits and one holding readout and control structures.
Does flip-chip hurt coherence?
The 2017 and 2022 papers report that high coherence is maintained, within their devices.
What gate fidelities were reported?
Above 99.9% single-qubit and above 98.6% two-qubit in the 2022 module study.
Is indium bonding the only method?
No. The 2021 paper demonstrates a simpler assembly using low-force contacts and adhesives.
Does this give hundreds of qubits today?
No. That is the 2022 authors' projection.
All field notes